Download Speedy DDR2 Controller for FPGAs from Official Microsoft Download Center

The Speedy DDR2 controller is intended as an improvement on the Xilinx MIG controller for Virtex 5 FPGAs. Last published: March 18, 2011.

FPGA and IP EnclustraCatalogue PDF, PDF, Flash Memory

Nexys A7 Reference Manual - Digilent Reference

Xcell Software Journal issue 1 by Xilinx Xcell Publications - Issuu

Spartan 6 FPGA Family

ATSAMA5D225C-D1M Microchip Technology

Principles and Structures of FPGAs, PDF, Field Programmable Gate Array

Cyclone® V FPGA - Intel® FPGA

Timing model for LPDDR2

How to implement high-speed 667 Mbps DDR2 interfaces with FPGAs - EE Times

NanoUSB3 Eval Kit for NanEye GS Datasheet by ams

Spartan-6 BGA test board

Download - Farnell

Side Processing - an overview